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Title: Offset-free rail-to-rail derandomizing peak detect-and-hold circuit

Patent ·
OSTI ID:875012
 [1];  [2];  [3]
  1. Nesconset, NY
  2. Bellport, NY
  3. Coram, NY
+ Show Author Affiliations

A peak detect-and-hold circuit eliminates errors introduced by conventional amplifiers, such as common-mode rejection and input voltage offset. The circuit includes an amplifier, three switches, a transistor, and a capacitor. During a detect-and-hold phase, a hold voltage at a non-inverting in put terminal of the amplifier tracks an input voltage signal and when a peak is reached, the transistor is switched off, thereby storing a peak voltage in the capacitor. During a readout phase, the circuit functions as a unity gain buffer, in which the voltage stored in the capacitor is provided as an output voltage. The circuit is able to sense signals rail-to-rail and can readily be modified to sense positive, negative, or peak-to-peak voltages. Derandomization may be achieved by using a plurality of peak detect-and-hold circuits electrically connected in parallel.

Research Organization:
Brookhaven National Laboratory (BNL), Upton, NY (United States)
DOE Contract Number:
AC02-98CH10886
Assignee:
Brookhaven Science Associates LLC (Upton, NY)
Patent Number(s):
US 6512399
OSTI ID:
875012
Country of Publication:
United States
Language:
English

References (8)

A preamplifier-shaper-stretcher integrated circuit system for use with germanium strip detectors journal January 2000
A CMOS peak detect sample and hold circuit journal January 1994
Low voltage MOS-transistor-only precision current peak detector with signal independent discharge time constant conference January 1997
A novel peak amplitude and time detector for narrow pulse signals journal December 1986
Fast peak detector stretchers for use in XAFS applications journal January 1999
On the Design of Pulse Peak Stretchers journal January 1969
Very low-power consumption analog pulse processing ASIC for semiconductor radiation detectors
  • Wessendorf, K. O.; Lund, J. C.; Brunett, B. A.
  • 1998 IEEE Nuclear Science Symposium Conference Record. 1998 IEEE Nuclear Science Symposium and Medical Imaging Conference (Cat. No.98CH36255) https://doi.org/10.1109/NSSMIC.1998.775189
conference January 1998
A low-power, CMOS peak detect and hold circuit for nuclear pulse spectroscopy journal January 1995

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Related Subjects

offset-free
rail-to-rail
derandomizing
peak
detect-and-hold
circuit
eliminates
errors
introduced
conventional
amplifiers
common-mode
rejection
input
voltage
offset
amplifier
switches
transistor
capacitor
phase
hold
non-inverting
terminal
tracks
signal
reached
switched
storing
readout
functions
unity
buffer
stored
provided
output
sense
signals
readily
modified
positive
negative
peak-to-peak
voltages
derandomization
achieved
plurality
circuits
electrically
connected
parallel
electrically connected
hold circuit
input voltage
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