A heterogeneous hierarchical architecture for real-time computing
The need for high-speed data acquisition and control algorithms has prompted continued research in the area of multiprocessor systems and related programming techniques. The result presented here is a unique hardware and software architecture for high-speed real-time computer systems. The implementation of a prototype of this architecture has required the integration of architecture, operating systems and programming languages into a cohesive unit. This report describes a Heterogeneous Hierarchial Architecture for Real-Time (H{sup 2} ART) and system software for program loading and interprocessor communication.
- Research Organization:
- Los Alamos National Lab. (LANL), Los Alamos, NM (United States); North Carolina State Univ., Raleigh, NC (United States)
- OSTI ID:
- 476634
- Report Number(s):
- LA-SUB-93-81; ON: DE97003578; TRN: 97:002288-0010
- Resource Relation:
- Other Information: PBD: Dec 1988; Related Information: Is Part Of Precision Engineering Center. 1988 Annual report, Volume VI; Dow, T. [ed.]; Fornaro, R.; Keltie, R.; Paesler, M. [and others]; PB: 367 p.
- Country of Publication:
- United States
- Language:
- English
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