Method and apparatus for back end gather/scatter memory coalescing

Cain, III, Harold W.; Lakshminarayana, Nagesh Bangalore; Ernst, Daniel Jonathan; Mehta, Sanyam

Title: Method and apparatus for back end gather/scatter memory coalescing

Patent · Tue Jan 31 00:00:00 EST 2023

OSTI ID:1987088

Cain, III, Harold W.; Lakshminarayana, Nagesh Bangalore; Ernst, Daniel Jonathan; Mehta, Sanyam

A system for processing gather and scatter instructions can implement a front-end subsystem, a back-end subsystem, or both. The front-end subsystem includes a prediction unit configured to determine a predicted quantity of coalesced memory access operations required by an instruction. A decode unit converts the instruction into a plurality of access operations based on the predicted quantity, and transmits the plurality of access operations and an indication of the predicted quantity to an issue queue. The back-end subsystem includes a load-store unit that receives a plurality of access operations corresponding to an instruction, determines a subset of the plurality of access operations that can be coalesced, and forms a coalesced memory access operation from the subset. A queue stores multiple memory addresses for a given load-store entry to provide for execution of coalesced memory accesses.

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Research Organization:: Marvell Asia PTE, Ltd. (Singapore); Cray Inc., Seattle, WA (United States); Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)

Sponsoring Organization:: USDOE

DOE Contract Number:: AC52-07NA27344; B620872

Assignee:: Marvell Asia Pte Ltd (Singapore, SG); Cray Inc. (Seattle, WA)

Patent Number(s):: 11,567,771

Application Number:: 16/944,146

OSTI ID:: 1987088

Resource Relation:: Patent File Date: 07/30/2020

Country of Publication:: United States

Language:: English

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