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Title: Partial discharge suppression in high voltage solid-state devices

Patent ·
OSTI ID:1987054

Devices, methods and techniques are disclosed to suppress electrical discharge and breakdown in insulating or encapsulation material(s) applied to solid-state devices. In one example aspect, a multi-layer encapsulation film includes a first layer of a first dielectric material and a second layer of a second dielectric material. An interface between the first layer and the second layer is configured to include molecular bonds to prevent charge carriers from crossing between the first layer and the second layer. The multi-layer encapsulation configuration is structured to allow an electrical contact and a substrate of the solid-state device to be at least partially surrounded by the multi-layer encapsulation configuration.

Research Organization:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Opcondys, Inc., Manteca, CA (United States)
Sponsoring Organization:
USDOE Advanced Research Projects Agency - Energy (ARPA-E)
DOE Contract Number:
AC52-07NA27344; AR0000907
Assignee:
Lawrence Livermore National Security, LLC (Livermore, CA); Opcondys, Inc. (Manteca, CA)
Patent Number(s):
11,557,646
Application Number:
17/177,884
OSTI ID:
1987054
Resource Relation:
Patent File Date: 02/17/2021
Country of Publication:
United States
Language:
English

References (3)

Solar Cell Receiver Having an Insulated Bypass Diode patent-application June 2010
An Electronic Device Package patent-application December 2018
Semiconductor Device patent-application March 2020

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