skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Performance for GPU exceptions

Patent ·
OSTI ID:1892615

Techniques for improving performance of accelerated processing devices (“APDs”) when exceptions occur are provided. In APDs, the very large number of parallel processing execution units, and the complexity of the hardware used to execute a large number of work-items in parallel, means that APDs typically stall when an exception occurs (unlike in central processing units (“CPUs”), which are able to execute speculatively and out-of-order). However, the techniques provided herein allow at least some execution to occur past exceptions. Execution past an exception generating instruction occurs by executing instructions that would not lead to a corruption while skipping those that would lead to a corruption. After the exception has been satisfied, execution occurs in a replay mode in which the potentially exception-generating instruction is executed and in which instructions that did not execute in the exception-wait mode are executed. A mask and counter are used to control execution in replay mode.

Research Organization:
Advanced Micro Devices, Inc., Santa Clara, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC52-07NA27344; B620717
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Number(s):
11,249,765
Application Number:
16/109,567
OSTI ID:
1892615
Resource Relation:
Patent File Date: 08/22/2018
Country of Publication:
United States
Language:
English

References (7)

Method and Apparatus for Servicing Page Fault Exceptions patent-application June 2013
Instructions and Logic to Interrupt and Resume Paging in a Secure Enclave Page Cache patent-application December 2015
iGPU: Exception support and speculative execution on GPUs conference June 2012
Towards high performance paged memory for GPUs conference March 2016
vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design conference October 2016
Instruction and logic for interrupt and exception handling patent October 2019
Efficient exception handling support for GPUs conference October 2017