Three-phase, three-level inverters and methods for performing soft switching with phase synchronization
A three-phase, N-level inverter and method are disclosed. A circuit topology of the inverter comprises first, second and third sets of switches and first, second and third inductors. Each switch comprises at least first, second and third terminals, the first terminals being control terminals. The first terminals of the first, second and third inductors are electrically coupled to the first, second and third sets of switches, respectively. A current controller performs a control algorithm that causes it to output first, second and third sets of gating signals to the control terminals of the switches of the first, second and third sets of switches, respectively, to cause them to be placed in an on state or an off state in a particular sequence to perform zero voltage switching while maintaining synchronization of the three phases of the three-phase, N-level inverter.
- Research Organization:
- Virginia Polytechnic and State Univ. (Virginia Tech), Blacksburg, VA (United States)
- Sponsoring Organization:
- USDOE Office of Energy Efficiency and Renewable Energy (EERE)
- DOE Contract Number:
- EE0006521
- Assignee:
- Virginia Tech Intellectual Properties, Inc. (Blacksburg, VA)
- Patent Number(s):
- 10,886,860
- Application Number:
- 16/416,915
- OSTI ID:
- 1805366
- Resource Relation:
- Patent File Date: 05/20/2019
- Country of Publication:
- United States
- Language:
- English
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