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Title: Low temperature cofired ceramic substrates and fabrication techniques for the same

Patent ·
OSTI ID:1735057

A low temperature cofired ceramic substrate comprises a plurality of dielectric layers, at least one inner conductor layer, a plurality of bond pads, and a solder mask. The dielectric layers are formed from ceramic material and placed one on top of another to form a stack. The inner conductor is formed from electrically conductive paste and positioned on an upper surface of at least one inner dielectric layer. The bond pads are positioned on an outer surface of the stack. Each bond pad is formed from a plurality of conductive sublayers of thin film metal stacked one on top of another, with each conductive sublayer being formed from a different metal. The solder mask is positioned on the same outer surface of the stack as the bond pads and includes a plurality of openings, with each opening exposing at least a portion of one of the bond pads.

Research Organization:
Kansas City Plant (KCP), Kansas City, MO (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
NA0000622
Assignee:
Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)
Patent Number(s):
10,720,338
Application Number:
15/805,352
OSTI ID:
1735057
Resource Relation:
Patent File Date: 11/07/2017
Country of Publication:
United States
Language:
English

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Circuit board and manufacturing method thereof patent-application July 2009
Micro-electromechanical process for fabrication of integrated multi-frequency communication passive components patent August 2003
Phased array antenna using (MEMS) devices on low-temperature co-fired ceramic (LTCC) substrates patent March 2006

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