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Title: Technique for protecting chip corners in wet chemical etching of silicon wafers

Technical Report ·
DOI:https://doi.org/10.2172/10169930· OSTI ID:10169930

When a silicon wafer is under wet chemical etching, any outer comers of a chip may face severe undercutting. This undercutting problem is extremely serious for the boundary comers of the chips; and very often it can limit the compactness in the design of the chips. A special etching mask pattern was developed for protecting the boundary comers of the chips under wet chemical etching. The main central part of this pattern could prevent any undercutting at the comers during the etching. But, there was a timing ``fuse`` that would eliminate this central part and open up the comers at any desired time. Thus, the corner protection could be set up for only a specific length of time. With this ``timing bomb`` device, it in turn could allow better compactness in the design of the chips.

Research Organization:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Organization:
USDOE, Washington, DC (United States)
DOE Contract Number:
W-7405-ENG-48
OSTI ID:
10169930
Report Number(s):
UCRL-ID-106549; ON: DE93017049
Resource Relation:
Other Information: PBD: Feb 1991
Country of Publication:
United States
Language:
English