Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components

Cher, Chen-Yong; Coteus, Paul W; Gara, Alan; Kursun, Eren; Paulsen, David P; Schuelke, Brian A; Sheets, II, John E; Tian, Shurong

Title: Reliability and performance of a system-on-a-chip by predictive wear-out based activation of functional components

Patent · Tue Oct 01 00:00:00 EDT 2013

OSTI ID:1107341

Cher, Chen-Yong; Coteus, Paul W; Gara, Alan; Kursun, Eren; Paulsen, David P; Schuelke, Brian A; Sheets, II, John E; Tian, Shurong

A processor-implemented method for determining aging of a processing unit in a processor the method comprising: calculating an effective aging profile for the processing unit wherein the effective aging profile quantifies the effects of aging on the processing unit; combining the effective aging profile with process variation data, actual workload data and operating conditions data for the processing unit; and determining aging through an aging sensor of the processing unit using the effective aging profile, the process variation data, the actual workload data, architectural characteristics and redundancy data, and the operating conditions data for the processing unit.

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Research Organization:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Organization:: USDOE

DOE Contract Number:: B554331

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Number(s):: 8,549,363

Application Number:: 12/727,967

OSTI ID:: 1107341

Country of Publication:: United States

Language:: English

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