skip to main content
OSTI.GOV title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: A configurable-hardware document-similarity classifier to detect web attacks.

Conference ·
OSTI ID:1002067
;  [1]
  1. Lawrence Livermore National Laboratory

This paper describes our approach to adapting a text document similarity classifier based on the Term Frequency Inverse Document Frequency (TFIDF) metric to reconfigurable hardware. The TFIDF classifier is used to detect web attacks in HTTP data. In our reconfigurable hardware approach, we design a streaming, real-time classifier by simplifying an existing sequential algorithm and manipulating the classifier's model to allow decision information to be represented compactly. We have developed a set of software tools to help automate the process of converting training data to synthesizable hardware and to provide a means of trading off between accuracy and resource utilization. The Xilinx Virtex 5-LX implementation requires two orders of magnitude less memory than the original algorithm. At 166MB/s (80X the software) the hardware implementation is able to achieve Gigabit network throughput at the same accuracy as the original algorithm.

Research Organization:
Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
Sponsoring Organization:
USDOE
DOE Contract Number:
AC04-94AL85000
OSTI ID:
1002067
Report Number(s):
SAND2010-2057C; TRN: US201102%%508
Resource Relation:
Conference: Proposed for presentation at the Reconfigurable Architectures Workshop 2010 held April 19-23 ,2010 in Atlanta, GA.
Country of Publication:
United States
Language:
English

Similar Records

Massively Multi-core Acceleration of a Document-Similarity Classifier to Detect Web Attacks
Journal Article · Thu Jan 14 00:00:00 EST 2010 · Journal of Parallel and Distributed Computing, vol. 71, no. 2, February 1, 2011, pp. 225-235 · OSTI ID:1002067

A configurable-hardware document-similarity classifier to detect web attacks.
Conference · Thu Apr 01 00:00:00 EDT 2010 · OSTI ID:1002067

Mitigation of cache memory using an embedded hard-core PPC440 processor in a Virtex-5 Field Programmable Gate Array.
Technical Report · Mon Feb 01 00:00:00 EST 2010 · OSTI ID:1002067