Sparse Data Acquisition on Emerging Memory Architectures

Quach, Tu-Thach; Agarwal, Sapan; James, Conrad D.; Marinella, Matthew J.; Aimone, James B.

doi:10.1109/ACCESS.2018.2886931

Title: Sparse Data Acquisition on Emerging Memory Architectures

Abstract

Emerging memory devices, such as resistive crossbars, have the capacity to store large amounts of data in a single array. Acquiring the data stored in large-capacity crossbars in a sequential fashion can become a bottleneck. We present practical methods, based on sparse sampling, to quickly acquire sparse data stored on emerging memory devices that support the basic summation kernel, reducing the acquisition time from linear to sub-linear. The experimental results show that at least an order of magnitude improvement in acquisition time can be achieved when the data are sparse. Finally, in addition, we show that the energy cost associated with our approach is competitive to that of the sequential method.

Authors:

; Agarwal, Sapan; James, Conrad D.; Marinella, Matthew J.; Aimone, James B.

Publication Date:: Tue Jan 01 00:00:00 EST 2019

Research Org.:: Sandia National Lab. (SNL-NM), Albuquerque, NM (United States); Sandia National Lab. (SNL-CA), Livermore, CA (United States)

Sponsoring Org.:: USDOE National Nuclear Security Administration (NNSA)

OSTI Identifier:: 1839852

Alternate Identifier(s):: OSTI ID: 1492354

Report Number(s):: SAND-2018-14005J
Journal ID: ISSN 2169-3536; 8576509

Grant/Contract Number:: AC04-94AL85000

Resource Type:: Published Article

Journal Name:: IEEE Access

Additional Journal Information:: Journal Name: IEEE Access Journal Volume: 7; Journal ID: ISSN 2169-3536

Publisher:: Institute of Electrical and Electronics Engineers

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING; Memory acquisition; crossbar; sparse sampling; sparsity estimation

Citation Formats


                    Quach, Tu-Thach, Agarwal, Sapan, James, Conrad D., Marinella, Matthew J., and Aimone, James B. Sparse Data Acquisition on Emerging Memory Architectures.  United States: N. p., 2019. 
Web.  doi:10.1109/ACCESS.2018.2886931.

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                    Quach, Tu-Thach, Agarwal, Sapan, James, Conrad D., Marinella, Matthew J., & Aimone, James B. Sparse Data Acquisition on Emerging Memory Architectures.  United States.  https://doi.org/10.1109/ACCESS.2018.2886931

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                    Quach, Tu-Thach, Agarwal, Sapan, James, Conrad D., Marinella, Matthew J., and Aimone, James B. Tue .  
"Sparse Data Acquisition on Emerging Memory Architectures".  United States.  https://doi.org/10.1109/ACCESS.2018.2886931.

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@article{osti_1839852,

  title        = {Sparse Data Acquisition on Emerging Memory Architectures},

  author       = {Quach, Tu-Thach and Agarwal, Sapan and James, Conrad D. and Marinella, Matthew J. and Aimone, James B.},

  abstractNote = {Emerging memory devices, such as resistive crossbars, have the capacity to store large amounts of data in a single array. Acquiring the data stored in large-capacity crossbars in a sequential fashion can become a bottleneck. We present practical methods, based on sparse sampling, to quickly acquire sparse data stored on emerging memory devices that support the basic summation kernel, reducing the acquisition time from linear to sub-linear. The experimental results show that at least an order of magnitude improvement in acquisition time can be achieved when the data are sparse. Finally, in addition, we show that the energy cost associated with our approach is competitive to that of the sequential method.},

  doi          = {10.1109/ACCESS.2018.2886931},

  journal      = {IEEE Access},

  number       = ,

  volume       = 7,

  place        = {United States},

  year         = {Tue Jan 01 00:00:00 EST 2019},

  month        = {Tue Jan 01 00:00:00 EST 2019}

}

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Figures / Tables:

Fig. 1: Diagram of a 4-by-4 crossbar. Solid lines are active and dashed lines are inactive. In this illustration, we are reading rows 2 and 4 of column 2. The output value is x₂ + x₄. The summation is a native kernel operation of crossbars and is the core kernelmore »

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