Method and apparatus for inter-lane thread migration
Abstract
Briefly, methods and apparatus to migrate a software thread from one wavefront executing on one execution unit to another wavefront executing on another execution unit whereby both execution units are associated with a compute unit of a processing device such as, for example, a GPU. The methods and apparatus may execute compiled dynamic thread migration swizzle buffer instructions that when executed allow access to a dynamic thread migration swizzle buffer that allows for the migration of register context information when migrating software threads. The register context information may be located in one or more locations of a register file prior to storing the register context information into the dynamic thread migration swizzle buffer. The method and apparatus may also return the register context information from the dynamic thread migration swizzle buffer to one or more different register file locations of the register file.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1576343
- Patent Number(s):
- 10409610
- Application Number:
- 15/010,093
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- AC52-07NA27344; B600716
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2016 Jan 29
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Beckmann, Bradford, and Puthoor, Sooraj. Method and apparatus for inter-lane thread migration. United States: N. p., 2019.
Web.
Beckmann, Bradford, & Puthoor, Sooraj. Method and apparatus for inter-lane thread migration. United States.
Beckmann, Bradford, and Puthoor, Sooraj. Tue .
"Method and apparatus for inter-lane thread migration". United States. https://www.osti.gov/servlets/purl/1576343.
@article{osti_1576343,
title = {Method and apparatus for inter-lane thread migration},
author = {Beckmann, Bradford and Puthoor, Sooraj},
abstractNote = {Briefly, methods and apparatus to migrate a software thread from one wavefront executing on one execution unit to another wavefront executing on another execution unit whereby both execution units are associated with a compute unit of a processing device such as, for example, a GPU. The methods and apparatus may execute compiled dynamic thread migration swizzle buffer instructions that when executed allow access to a dynamic thread migration swizzle buffer that allows for the migration of register context information when migrating software threads. The register context information may be located in one or more locations of a register file prior to storing the register context information into the dynamic thread migration swizzle buffer. The method and apparatus may also return the register context information from the dynamic thread migration swizzle buffer to one or more different register file locations of the register file.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Sep 10 00:00:00 EDT 2019},
month = {Tue Sep 10 00:00:00 EDT 2019}
}
Works referenced in this record:
GPU Divergence Barrier
patent-application, April 2015
- Mei, Chunhui; Bourd, Alexei Vladimirovich; Chen, Lin
- US Patent Application 14/043562; 20150095914
Unified virtual addressed register file
patent, July 2014
- Du, Yun; Jiao, Guofang; Yu, Chun
- US Patent Document 8,766,996