System, methods and apparatus for program optimization for multi-threaded processor architectures
Abstract
Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
- Inventors:
- Issue Date:
- Research Org.:
- Reservoir Labs, Inc., New York, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1167014
- Patent Number(s):
- 8930926
- Application Number:
- 12/762,281
- Assignee:
- Reservoir Labs, Inc. (New York, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- FG02-08ER85149
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2010 Apr 16
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Bastoul, Cedric, Lethin, Richard A., Leung, Allen K., Meister, Benoit J., Szilagyi, Peter, Vasilache, Nicolas T., and Wohlford, David E. System, methods and apparatus for program optimization for multi-threaded processor architectures. United States: N. p., 2015.
Web.
Bastoul, Cedric, Lethin, Richard A., Leung, Allen K., Meister, Benoit J., Szilagyi, Peter, Vasilache, Nicolas T., & Wohlford, David E. System, methods and apparatus for program optimization for multi-threaded processor architectures. United States.
Bastoul, Cedric, Lethin, Richard A., Leung, Allen K., Meister, Benoit J., Szilagyi, Peter, Vasilache, Nicolas T., and Wohlford, David E. Tue .
"System, methods and apparatus for program optimization for multi-threaded processor architectures". United States. https://www.osti.gov/servlets/purl/1167014.
@article{osti_1167014,
title = {System, methods and apparatus for program optimization for multi-threaded processor architectures},
author = {Bastoul, Cedric and Lethin, Richard A. and Leung, Allen K. and Meister, Benoit J. and Szilagyi, Peter and Vasilache, Nicolas T. and Wohlford, David E.},
abstractNote = {Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2015},
month = {1}
}
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System, methods and apparatus for program optimization for multi-threaded processor architectures
patent, January 2015
- Bastoul, Cedric; Lethin, Richard A.; Leung, Allen K.
- US Patent Document 8,930,926
System, methods and apparatus for program optimization for multi-threaded processor architectures
patent, January 2015
- Bastoul, Cedric; Lethin, Richard A.; Leung, Allen K.
- US Patent Document 8,930,926