Method and apparatus for a page-local delta-based prefetcher
Abstract
A method includes recording a first set of consecutive memory access deltas, where each of the consecutive memory access deltas represents a difference between two memory addresses accessed by an application, updating values in a prefetch training table based on the first set of memory access deltas, and predicting one or more memory addresses for prefetching responsive to a second set of consecutive memory access deltas and based on values in the prefetch training table.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States); Advanced Micro Devices, Inc., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 2222125
- Patent Number(s):
- 11726917
- Application Number:
- 16/927,786
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 07/13/2020
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Mashimo, Susumu, and Kalamatianos, John. Method and apparatus for a page-local delta-based prefetcher. United States: N. p., 2023.
Web.
Mashimo, Susumu, & Kalamatianos, John. Method and apparatus for a page-local delta-based prefetcher. United States.
Mashimo, Susumu, and Kalamatianos, John. Tue .
"Method and apparatus for a page-local delta-based prefetcher". United States. https://www.osti.gov/servlets/purl/2222125.
@article{osti_2222125,
title = {Method and apparatus for a page-local delta-based prefetcher},
author = {Mashimo, Susumu and Kalamatianos, John},
abstractNote = {A method includes recording a first set of consecutive memory access deltas, where each of the consecutive memory access deltas represents a difference between two memory addresses accessed by an application, updating values in a prefetch training table based on the first set of memory access deltas, and predicting one or more memory addresses for prefetching responsive to a second set of consecutive memory access deltas and based on values in the prefetch training table.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Aug 15 00:00:00 EDT 2023},
month = {Tue Aug 15 00:00:00 EDT 2023}
}
Works referenced in this record:
Graph Prefetching Using Data Structure Knowledge
conference, June 2016
- Ainsworth, Sam; Jones, Timothy M.
- Proceedings of the 2016 International Conference on Supercomputing
Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers
conference, February 2014
- Pugsley, Seth H.; Chishti, Zeshan; Wilkerson, Chris
- 2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)
Path confidence based lookahead prefetching
conference, October 2016
- Kim, Jinchun; Pugsley, Seth H.; Gratz, Paul V.
- 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
Spatial Memory Streaming
journal, May 2006
- Somogyi, Stephen; Wenisch, Thomas F.; Ailamaki, Anastassia
- ACM SIGARCH Computer Architecture News, Vol. 34, Issue 2
Pattern-Aware Prefetching Using Parallel Log-Structured File System
patent-application, April 2020
- Bent, John M.; Faibish, Sorin; Grider, Gary
- 16/716972; 20200125493
Best-offset hardware prefetching
conference, March 2016
- Michaud, Pierre
- 2016 IEEE International Symposium on High Performance Computer Architecture (HPCA)
Generating a set of pre-fetch address candidates based on popular sets of address and data offset counters
patent, September 2008
- Ross, Richard
- US Patent Document 7,430,650
Perceptron-based prefetch filtering
conference, June 2019
- Bhatia, Eshan; Chacon, Gino; Pugsley, Seth
- Proceedings of the 46th International Symposium on Computer Architecture
Efficiently prefetching complex address patterns
conference, December 2015
- Shevgoor, Manjunath; Koladiya, Sahil; Balasubramonian, Rajeev
- Proceedings of the 48th International Symposium on Microarchitecture