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Title: Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests

Abstract

An electronic device handles memory access requests for data in a memory. The electronic device includes a memory controller for the memory, a last-level cache memory, a request generator, and a predictor. The predictor determines a likelihood that a cache memory access request for data at a given address will hit in the last-level cache memory. Based on the likelihood, the predictor determines: whether a memory access request is to be sent by the request generator to the memory controller for the data in parallel with the cache memory access request being resolved in the last-level cache memory, and, when the memory access request is to be sent, a type of memory access request that is to be sent. When the memory access request is to be sent, the predictor causes the request generator to send a memory request of the type to the memory controller.

Inventors:
; ; ; ;
Issue Date:
Research Org.:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1735050
Patent Number(s):
10719441
Application Number:
16/274,146
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
AC52-07NA27344
Resource Type:
Patent
Resource Relation:
Patent File Date: 02/12/2019
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Yin, Jieming, Eckert, Yasuko, Poremba, Matthew R., Raasch, Steven E., and Hunt, Doug. Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests. United States: N. p., 2020. Web.
Yin, Jieming, Eckert, Yasuko, Poremba, Matthew R., Raasch, Steven E., & Hunt, Doug. Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests. United States.
Yin, Jieming, Eckert, Yasuko, Poremba, Matthew R., Raasch, Steven E., and Hunt, Doug. Tue . "Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests". United States. https://www.osti.gov/servlets/purl/1735050.
@article{osti_1735050,
title = {Using predictions of outcomes of cache memory access requests for controlling whether a request generator sends memory access requests to a memory in parallel with cache memory access requests},
author = {Yin, Jieming and Eckert, Yasuko and Poremba, Matthew R. and Raasch, Steven E. and Hunt, Doug},
abstractNote = {An electronic device handles memory access requests for data in a memory. The electronic device includes a memory controller for the memory, a last-level cache memory, a request generator, and a predictor. The predictor determines a likelihood that a cache memory access request for data at a given address will hit in the last-level cache memory. Based on the likelihood, the predictor determines: whether a memory access request is to be sent by the request generator to the memory controller for the data in parallel with the cache memory access request being resolved in the last-level cache memory, and, when the memory access request is to be sent, a type of memory access request that is to be sent. When the memory access request is to be sent, the predictor causes the request generator to send a memory request of the type to the memory controller.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {7}
}

Works referenced in this record:

Predicting Outcomes for Memory Requests in a Cache Memory
patent-application, May 2014


Efficient Memory Aware Cache Management
patent-application, June 2018


Prefetching of Data and Instructions in a Data Processing Apparatus
patent-application, September 2014


Proactive Cache Coherence
patent-application, June 2018


Cache to Cache Data Transfer Acceleration Techniques
patent-application, June 2019


Dynamic Evaluation and Reconfiguration of a Data Prefetcher
patent-application, May 2014


Cache Circuitry, Data Processing Apparatus and Method for Prefetching Data
patent-application, September 2008


System, Apparatus and Method for Prefetch-Aware Replacement in a Cache Memory Hierarchy of a Processor
patent-application, March 2019


System, Apparatus and Method for Predicting Accesses to a Memory
patent-application, February 2006


Selective Downstream Cache Processing for Data Access
patent-application, January 2019