Hybrid MOSFET/Driver for Ultra-Fast Switching

Journal Article · Tue Jul 14 00:00:00 EDT 2009 · IEEE Transactions on Dielectrics and Electrical Insulation

DOI:https://doi.org/10.1109/TDEI.2009.5211841· OSTI ID:959349

Tang, T

The ultra-fast switching of power MOSFETs, in about 1ns, is very challenging. This is largely due to the parasitic inductance that is intrinsic to commercial packages used for both MOSFETs and drivers. Parasitic gate and source inductance not only limit the voltage rise time on the MOSFET internal gate structure but can also cause the gate voltage to oscillate. This paper describes a hybrid approach that substantially reduces the parasitic inductance between the driver and MOSFET gate, as well as between the MOSFET source and its external connection. A flip chip assembly is used to directly attach a die-form power MOSFET and driver on a PCB. The parasitic inductances are significantly reduced by eliminating bond wires and minimizing lead length. The experimental results demonstrate ultra-fast switching of the power MOSFET with excellent control of the gate-source voltage.

• Research Organization: Stanford Linear Accelerator Center (SLAC)
• Sponsoring Organization: USDOE
• DOE Contract Number: AC02-76SF00515
• OSTI ID: 959349
• Report Number(s): SLAC-PUB-13410
• Journal Information: IEEE Transactions on Dielectrics and Electrical Insulation, Journal Name: IEEE Transactions on Dielectrics and Electrical Insulation
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
ENG
HYBRID SYSTEMS
INDUCTANCE
MOSFET
PERFORMANCE
PULSE RISE TIME
SWITCHES