Integrated upstream parasitic event building architecture for BTeV level 1 pixel trigger system
Contemporary event building approaches use data switches, either homemade or commercial off-the-shelf ones, to merge data from different channels and distribute them among processor nodes. However, in many trigger and DAQ systems, the merging and distributing functions can often be performed in pre-processing stages. By carefully integrating these functions into the upstream pre-processing stages, the events can be built without dedicated switches. In addition to the cost reducing, extra benefits are gain when the event is built early upstream. In this document, an example of the integrated upstream parasitic event building architecture that has been studied for the BTeV level 1 pixel trigger system is described. Several design considerations that experimentalists of other projects might be interested in are also discussed.
- Research Organization:
- Fermi National Accelerator Lab. (FNAL), Batavia, IL (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC02-76CH03000
- OSTI ID:
- 891080
- Report Number(s):
- FERMILAB-PUB-06-064-E; TRN: US0701119
- Journal Information:
- IEEE Trans.Nucl.Sci.53:1039-1044,2006, Conference: Presented at 14th IEEE - NPSS Real Time Conference 2005 (RT2005), Stockholm, Sweden, 4-10 Jun 2005
- Country of Publication:
- United States
- Language:
- English
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