Thin Film Transistors On Plastic Substrates

Patent · Tue Jan 20 00:00:00 EST 2004

OSTI ID:879500

Carey, Paul G ^[1]; Smith, Patrick M ^[2]; Sigmon, Thomas W ^[3]; Aceves, Randy C ^[4]

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1. Mountain View, CA
2. San Ramon, CA
3. Portola Valley, CA
4. Livermore, CA

A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The silicon based thin film transistor produced by the process includes a low temperature substrate incapable of withstanding sustained processing temperatures greater than about 250.degree. C., an insulating layer on the substrate, a layer of silicon on the insulating layer having sections of doped silicon, undoped silicon, and poly-silicon, a gate dielectric layer on the layer of silicon, a layer of gate metal on the dielectric layer, a layer of oxide on sections of the layer of silicon and the layer of gate metal, and metal contacts on sections of the layer of silicon and layer of gate metal defining source, gate, and drain contacts, and interconnects.

• Research Organization: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
• DOE Contract Number: W-7405-ENG-48
• Assignee: The Regents of the University of California (Oakland, CA)
• Patent Number(s): US 6680485
• Application Number: 09/025006
• OSTI ID: 879500
• Country of Publication: United States
• Language: English