Method for formation of thin film transistors on plastic substrates

Patent · Tue Oct 06 00:00:00 EDT 1998

OSTI ID:871878

Carey, Paul G ^[1]; Smith, Patrick M ^[2]; Sigmon, Thomas W ^[3]; Aceves, Randy C ^[4]

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1. Mountain View, CA
2. San Ramon, CA
3. Portola Valley, CA
4. Livermore, CA

A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics.

• Research Organization: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
• DOE Contract Number: W-7405-ENG-48
• Assignee: Regents of University of California (Oakland, CA)
• Patent Number(s): US 5817550
• Application Number: 08/611318
• OSTI ID: 871878
• Country of Publication: United States
• Language: English

Related Subjects

method
formation
film
transistors
plastic
substrates
process
tfts
replaces
standard
transistor
fabrication
techniques
sufficiently
processing
temperatures
inexpensive
glass
quartz
silicon
wafer-based
relies
depositing
semiconductors
dielectrics
metals
crystallizing
doping
semiconductor
layers
tft
pulsed
energy
source
creating
top-gate
self-aligned
back-gate
structures
enables
amorphous
polycrystalline
channel
prevent
damage
cost
electronics
flat
panel
displays
portable
pulsed energy
plastic substrate
prevent damage
film transistors
energy source
semiconductor layer
silicon wafer
flat panel
fabrication techniques
processing temperatures
process enables
panel displays
panel display
semiconductor layers
plastic substrates
temperatures sufficient
processing temperature
film transistor
doping semiconductor
cost electronic
/438/