High temperature superconductor step-edge Josephson junctions using Ti-Ca-Ba-Cu-O
Patent
·
OSTI ID:869576
- Evergreen, CO
- Placitas, NM
- Madison, WI
- Sunnyvale, CA
- Albuquerque, NM
A process for formulating non-hysteretic and hysteretic Josephson junctions using HTS materials which results in junctions having the ability to operate at high temperatures while maintaining high uniformity and quality. The non-hysteretic Josephson junction is formed by step-etching a LaAlO.sub.3 crystal substrate and then depositing a thin film of TlCaBaCuO on the substrate, covering the step, and forming a grain boundary at the step and a subsequent Josephson junction. Once the non-hysteretic junction is formed the next step to form the hysteretic Josephson junction is to add capacitance to the system. In the current embodiment, this is accomplished by adding a thin dielectric layer, LaA1O.sub.3, followed by a cap layer of a normal metal where the cap layer is formed by first depositing a thin layer of titanium (Ti) followed by a layer of gold (Au). The dielectric layer and the normal metal cap are patterned to the desired geometry.
- Research Organization:
- AT & T CORP
- DOE Contract Number:
- AC04-76DP00789
- Assignee:
- Sandia Corporation (Albuquerque, NM)
- Patent Number(s):
- US 5358928
- Application Number:
- 07/949,098
- OSTI ID:
- 869576
- Country of Publication:
- United States
- Language:
- English
Similar Records
High temperature superconductor step-edge Josephson junctions using Ti-Ca-Ba-Cu-O
Tl-Ca-Ba-Cu-O step-edge Josephson junctions
Fabrication of TlCaBaCuO step-edge Josephson junctions with hysteretic behavior
Patent
·
Tue Oct 25 00:00:00 EDT 1994
·
OSTI ID:6846815
Tl-Ca-Ba-Cu-O step-edge Josephson junctions
Journal Article
·
Sun Mar 01 23:00:00 EST 1992
· Applied Physics Letters; (United States)
·
OSTI ID:7047101
Fabrication of TlCaBaCuO step-edge Josephson junctions with hysteretic behavior
Journal Article
·
Sun Feb 23 23:00:00 EST 1992
· Applied Physics Letters; (United States)
·
OSTI ID:7047107
Related Subjects
/505/257/427/
ability
accomplished
add
adding
boundary
cap
cap layer
capacitance
covering
crystal
crystal substrate
current
depositing
desired
dielectric
dielectric layer
embodiment
film
followed
form
formed
forming
formulating
geometry
gold
grain
grain boundary
hysteretic
josephson
josephson junction
josephson junctions
junction
junctions
laa1o
laalo
layer
maintaining
materials
metal
metal cap
non-hysteretic
normal
normal metal
operate
patterned
process
quality
results
step
step-edge
step-etching
subsequent
substrate
superconductor
temperature
temperature superconductor
temperatures
ti-ca-ba-cu-o
titanium
tlcabacuo
uniformity
ability
accomplished
add
adding
boundary
cap
cap layer
capacitance
covering
crystal
crystal substrate
current
depositing
desired
dielectric
dielectric layer
embodiment
film
followed
form
formed
forming
formulating
geometry
gold
grain
grain boundary
hysteretic
josephson
josephson junction
josephson junctions
junction
junctions
laa1o
laalo
layer
maintaining
materials
metal
metal cap
non-hysteretic
normal
normal metal
operate
patterned
process
quality
results
step
step-edge
step-etching
subsequent
substrate
superconductor
temperature
temperature superconductor
temperatures
ti-ca-ba-cu-o
titanium
tlcabacuo
uniformity