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Title: A proposal for a UPC memory consistency model, v1.0

Abstract

The memory consistency model in a language defines the order in which the results of write operations maybe observed through read operations. The behavior of a UPC program may depend on the timing of accesses to shared variables, so a program defines a set of possible executions, rather than a single execution. The memory consistency model constrains the set of possible executions for a given program; the user may then rely on properties that are true of all of those executions. The memory consistency model is defined in terms of the read and write operations issued by each thread in naive translation of the code, i.e., without any code transformations by the compiler, with each thread issuing operations as defined by the abstract machine defined in ISO C 5.1.2.3. A UPC compiler or run time system may perform various code transformations to improve performance, so long as they are not visible to the programmer - i.e., provided the set of externally-visible behaviors (the input/output dynamics and volatile behavior defined in ISO C 5.1.2.3) from any execution of the transformed program are identical to those of the original program executing on the abstract machine and adhering to the consistency model definedmore » in this document.« less

Authors:
; ;
Publication Date:
Research Org.:
Lawrence Berkeley National Lab. (LBNL), Berkeley, CA (United States)
Sponsoring Org.:
USDOE Director. Office of Science. Computational and Environmental Research; Hewlett-Packard Company (US)
OSTI Identifier:
823757
Report Number(s):
LBNL-54983
R&D Project: K52004; TRN: US200415%%566
DOE Contract Number:  
AC03-76SF00098
Resource Type:
Technical Report
Resource Relation:
Other Information: PBD: 5 May 2004
Country of Publication:
United States
Language:
English
Subject:
99 GENERAL AND MISCELLANEOUS//MATHEMATICS, COMPUTING, AND INFORMATION SCIENCE; PROGRAMMING; PERFORMANCE; COMPUTER CODES; UPC MEMORY MODEL

Citation Formats

Yelick, Katherine, Bonachea, Dan, and Wallace, Charles. A proposal for a UPC memory consistency model, v1.0. United States: N. p., 2004. Web. doi:10.2172/823757.
Yelick, Katherine, Bonachea, Dan, & Wallace, Charles. A proposal for a UPC memory consistency model, v1.0. United States. doi:10.2172/823757.
Yelick, Katherine, Bonachea, Dan, and Wallace, Charles. Wed . "A proposal for a UPC memory consistency model, v1.0". United States. doi:10.2172/823757. https://www.osti.gov/servlets/purl/823757.
@article{osti_823757,
title = {A proposal for a UPC memory consistency model, v1.0},
author = {Yelick, Katherine and Bonachea, Dan and Wallace, Charles},
abstractNote = {The memory consistency model in a language defines the order in which the results of write operations maybe observed through read operations. The behavior of a UPC program may depend on the timing of accesses to shared variables, so a program defines a set of possible executions, rather than a single execution. The memory consistency model constrains the set of possible executions for a given program; the user may then rely on properties that are true of all of those executions. The memory consistency model is defined in terms of the read and write operations issued by each thread in naive translation of the code, i.e., without any code transformations by the compiler, with each thread issuing operations as defined by the abstract machine defined in ISO C 5.1.2.3. A UPC compiler or run time system may perform various code transformations to improve performance, so long as they are not visible to the programmer - i.e., provided the set of externally-visible behaviors (the input/output dynamics and volatile behavior defined in ISO C 5.1.2.3) from any execution of the transformed program are identical to those of the original program executing on the abstract machine and adhering to the consistency model defined in this document.},
doi = {10.2172/823757},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Wed May 05 00:00:00 EDT 2004},
month = {Wed May 05 00:00:00 EDT 2004}
}

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