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Emulation oriented, dynamic microprogrammable processor (version 3). Technical note No. 65

Technical Report ·
OSTI ID:7362998
This report describes the CPU of the Stanford Emulation Laboratory, known as the EMMY system. The EMMY CPU is a 32-bit microprogrammable processor designed specifically for the task of emulation research. The control store is dynamic; that is, it is writable by the CPU, and thus serves for data storage as well as for microinstruction storage. This report is a reissue of two previous reports, of the same title, issued at Johns Hopkins University as Hopkins Computer Research Reports No. 28 and No. 28.1. However, the material in this report differs somewhat from the previous reports in that the previous reports provided a design specification, and this report describes the system as it is now implemented. Specifically, this report provides an EMMY system user with the basic formation necessary to microprogram the EMMY CPU and to design hardware and software interfaces to the system bus. 17 figures
Research Organization:
Stanford Univ., Calif. (USA). Stanford Electronics Labs.
OSTI ID:
7362998
Report Number(s):
SU-326P39X4
Country of Publication:
United States
Language:
English

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