Solder leveling process
Patent
·
OSTI ID:7187765
Removal of excess or undesirable solder from printed circuit boards that may contain through-holes, conductors, connectors, etc. is accomplished by covering such boards with liquid flux, contacting with liquid solder, removing from the solder, and subsequently passing intermediate offset, hot gas jets which flow hot gas under pressure onto the boards and sweep off undesired solder, clear the holes, and leave an optimum thickness solder layer.
- Assignee:
- U.S. Energy Research and Development Administration
- Patent Number(s):
- US 3924794
- OSTI ID:
- 7187765
- Resource Relation:
- Patent File Date: Filed date 2 Dec 1974; Other Information: PAT-APPL-528,975
- Country of Publication:
- United States
- Language:
- English
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