Skip to main content
U.S. Department of Energy
Office of Scientific and Technical Information

Analog storage integrated circuit

Patent ·
OSTI ID:7165155
A high speed data storage array is defined utilizing a unique cell design for high speed sampling of a rapidly changing signal. Each cell of the array includes two input gates between the signal input and a storage capacitor. The gates are controlled by a high speed row clock and low speed column clock so that the instantaneous analog value of the signal is only sampled and stored by each cell on coincidence of the two clocks. 6 figs.
DOE Contract Number:
AC03-76SF00515
Assignee:
Leland Stanford Junior Univ., Stanford, CA (United States)
Patent Number(s):
A; US 4811285
Application Number:
PPN: US 7-144611
OSTI ID:
7165155
Country of Publication:
United States
Language:
English

Similar Records

Analog storage integrated circuit
Patent · Sat Dec 31 23:00:00 EST 1988 · OSTI ID:866868

An analog memory integrated circuit for waveform sampling up to 900 MHz
Conference · Mon Aug 01 00:00:00 EDT 1994 · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) · OSTI ID:6815586

An analog memory integrated circuit for waveform acquisition up to 900 MHz
Conference · Tue Nov 30 23:00:00 EST 1993 · OSTI ID:10136576