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U.S. Department of Energy
Office of Scientific and Technical Information

Parallel processing circuits for high speed calculation of the dot product of large dimensional vectors

Patent ·
OSTI ID:7159347

This patent describes a circuit for calculating a(i){center dot}b(j) where a(i) is the vector (a,(i),a{sub 2}(i)...,a{sub {ital Q}}(i)),b(j) is the vector (b,(j),b{sub 2}(j),...b{sub {ital Q}}(j)), each a{sub {ital k}}(i) is a zero or a one, and each b{sub {ital k}}(j) is a zero or a one. It comprises: first memory means for storing digital signals representing a(i); second memory means for storing digital signals representing b(j); a first serial-in-parallel-out barrel shift register for creating the bit planes a(o),...,a(N {minus} 1) from the digital signals stored in the first memory means; a second serial-in-parallel-out barrel shift register for creating the bit planes b(o),...,b(N {minus} 1) from the digital signals stored in the second memory means; a first OR gate having a first input connected to the first serial-in-parallel-out barrel shift register; a second OR gate having a first input connected to the second serial-in-parallel-out barrel shift register; means for applying a zero or a one to a second input of each of the OR gates; a correlator connected to an output of the first OR gate and an output of the second OR gate; and mean connected to the correlator for summing a plurality of successive outputs of the correlator.

Assignee:
General Dynamics Corp., Pomona Div., Pomona, CA
Patent Number(s):
A; US 4884232
Application Number:
PPN: US 7-133096A
OSTI ID:
7159347
Country of Publication:
United States
Language:
English