Layout system for printed circuit boards

Conference · Fri Aug 13 00:00:00 EDT 1976

OSTI ID:7128162

Smith, II, R J

The Electronics Engineering Department of the Lawrence Livermore Laboratory has recently developed a computer-aided printed circuit board layout system which is now being used to produce a variety of PC board designs. The system is able to handle boards with arbitrary trimline geometries having up to about 100 IC's. It was designed to achieve 90 to 95 percent automatic connection rates on two layer boards, and has also been used to produce four layer boards. Practical considerations which must be treated in development of an automated PC board layout system and the structure of the LLL system are discussed. Performance of the system and a critique of the system design are presented.

• Research Organization: California Univ., Livermore (USA). Lawrence Livermore Lab.
• DOE Contract Number: W-7405-ENG-48
• OSTI ID: 7128162
• Report Number(s): UCRL-78563; CONF-761120-1
• Country of Publication: United States
• Language: English

Related Subjects

42 ENGINEERING
420800* -- Engineering-- Electronic Circuits & Devices-- (-1989)
AUTOMATION
COMPUTER-AIDED DESIGN
ELECTRONIC CIRCUITS
PRINTED CIRCUITS