Compiler-assisted cache coherence solution for multiprocessors
Technical Report
·
OSTI ID:7065831
The existing solutions to multiprocessor cache coherence problem are not suitable, in our opinion, for systems with a large number of processors. A new solution is proposed in which a compiler generates cache management instructions. Conditions necessary for cache coherence violation are defined. The structure of a program and its dependence graph are used to detect when these conditions become true, and the instructions to enforce coherence are generated. No communication between processors is required at run-time to enforce coherence. The correctness of the solution is proved. 18 refs., 14 figs.
- Research Organization:
- Illinois Univ., Urbana (USA). Center for Supercomputing Research and Development
- DOE Contract Number:
- FG02-85ER25001
- OSTI ID:
- 7065831
- Report Number(s):
- DOE/ER/25001-5; ON: DE87002109
- Resource Relation:
- Other Information: Paper copy only, copy does not permit microfiche production
- Country of Publication:
- United States
- Language:
- English
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