Analysis and design of snubber circuits for high-power GTO DC-DC converters. [Gate Turn Off]

Journal Article · Fri Dec 31 23:00:00 EST 1993 · IEEE Transactions on Power Electronics (Institute of Electrical and Electronics Engineers); (United States)

DOI:https://doi.org/10.1109/63.285488· OSTI ID:7045636

Brambilla, A ^[1]; Dallago, E ^[2]

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1. Politecnico di Milano (Italy). Dipt. di Elettronica ed Informazione
2. Univ. of Pavia (Italy). Dipt. di Ingegneria Elettrica

This paper presents the analysis and the design of snubber circuits for high power DC-DC converters realized with Gate Turn Off (GTO) thyristors. These networks are fundamental for the safe operation of semiconductor devices but dissipate some energy. Means to minimize their losses are studied in this work. The snubber circuits described here are an evolution of the conventional C-snubber and L-snubber. The design of the snubbers is based upon circuits that permit the transfer of the trapped energy to the power source or to the load. Benefits, drawbacks and limits of each new proposed circuit are detailed and studied. Experimental results, obtained from a GTO laboratory prototype converter are reported.

• OSTI ID: 7045636
• Journal Information: IEEE Transactions on Power Electronics (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Transactions on Power Electronics (Institute of Electrical and Electronics Engineers); (United States) Vol. 9:1; ISSN ITPEE8; ISSN 0885-8993
• Country of Publication: United States
• Language: English

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