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Silicon-on-insulator devices for high voltage and power IC applications

Journal Article · · Journal of the Electrochemical Society; (United States)
DOI:https://doi.org/10.1149/1.2055040· OSTI ID:6913414
 [1]
  1. Philips Electronics North America Corp., Briarcliff Manor, NY (United States). Philips Lab.

Silicon-on-insulator (SOI) technology based on wafer bonding promises to deliver significant performance advantages and cost reduction over the existing bulk silicon technologies used for making power integrated circuits. A review is presented of the fundamental considerations that arise in the study of SOI devices for high-voltage applications. Significant device design parameters, such as the off-state breakdown voltage, on-state specific resistance, thermal dissipation, packing density, and manufacturability are discussed in the context of the applicable device physics and SOI material requirements. Several possible approaches for achieving high breakdown voltages in SOI devices are described. The advantages and limitations of each approach are discussed and illustrated with some recent results on experimental devices.

OSTI ID:
6913414
Journal Information:
Journal of the Electrochemical Society; (United States), Journal Name: Journal of the Electrochemical Society; (United States) Vol. 141:7; ISSN JESOAN; ISSN 0013-4651
Country of Publication:
United States
Language:
English