Advanced research in VLSI; Proceedings of the Fourth MIT Conference, Cambridge, MA, Apr. 7-9, 1986
The conference presents papers on a specialized silicon compiler for synchronizers, a generator of static CMOS layout from boolean expressions, a fine-grain homogeneous message-passage system, shared memory parallel processors, a parallel general-purpose CAM architecture, and an instruction cache design for use with a delayed branch. Other topics include partitioning circuits for improved testability, minimal area sizing of power and ground nets for VLSI circuits, the complexity of parallel computation, and interconnection patterns for parallel computers. Consideration is also given to a new systolic array for singular value decomposition, dynamic delay adjustment, and the use of VLSI in reducing serialization and memory traffic in shared memory parallel computers.
- OSTI ID:
- 6849084
- Report Number(s):
- CONF-8604309-
- Country of Publication:
- United States
- Language:
- English
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990210* -- Supercomputers-- (1987-1989)
ABSTRACTS
ARRAY PROCESSORS
COMPUTER-AIDED MANUFACTURING
COMPUTERIZED SIMULATION
DOCUMENT TYPES
ELECTRONIC CIRCUITS
INTEGRATED CIRCUITS
LEADING ABSTRACT
MANUFACTURING
MEETINGS
MEMORY DEVICES
MICROELECTRONIC CIRCUITS
PARALLEL PROCESSING
PROGRAMMING
RESEARCH PROGRAMS
SIMULATION