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A 64-ch time memory cell module with DSP and a VME interface

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
OSTI ID:6815577
;  [1]
  1. National Lab. for High Energy Physics, Ibaraki (Japan)
A new 64-channel Time Memory Cell (TMC) model has been developed for high-rate wire-chamber applications. A combination of the TMC chip and associated FIFO memories digitize and store input signals at 1 nsec/bit resolution for a period of 64 [mu]sec. To handle the large data size, a digital signal processor (DSP56002) is implemented in the module. The size of the module is 9U x 400 mm Euroboard size, and has VME interface using the P1 and P2 connectors. The P3 connector has been assigned for the output of trigger signals.
OSTI ID:
6815577
Report Number(s):
CONF-931051--
Conference Information:
Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Journal Volume: 41:4Pt1
Country of Publication:
United States
Language:
English