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Title: Gettering in high resistive float zone silicon wafers for silicon detector applications

Conference ·
OSTI ID:6807785

Experiments on intrinsic gettering of high resistive float-zone silicon wafers used for silicon position sensitive detectors lead to reduction of detector leakage current. Minority carrier life-time of gettered Si wafers was increased and measurements of C-V characteristics of gettered Si wafers also indicate that the gettering process produces an improved SiO/sub 2//Si interface. Intrinsic gettering was also compared with As-implanted and P-diffused back side gettering and found to be superior in this study.

Research Organization:
Brookhaven National Lab., Upton, NY (USA)
DOE Contract Number:
AC02-76CH00016
OSTI ID:
6807785
Report Number(s):
BNL-41347; CONF-881103-2; ON: DE88012136
Resource Relation:
Conference: IEEE nuclear science symposium, Orlando, FL, USA, 9 Nov 1988; Other Information: Portions of this document are illegible in microfiche products
Country of Publication:
United States
Language:
English