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Prototype-device fabrication and modeling for all semiconductor three dimensional integrated circuits

Thesis/Dissertation ·
OSTI ID:6721244
All-semiconductor three-dimensional integrated circuits will improve the reliability of electronic systems by reducing the number of interfaces between dissimilar materials, and increase power handling capability by eliminating insulators from within the monolith. All semiconductor circuits can be designed using BJTs or JFETs as the active devices, because they do not require metal or oxide. Two bistable circuits that employ enhancement mode and depletion mode JFETs are described. Junction isolation is achieved by enclosing devices within isolating boxes that place back to back junctions between the devices and the semiconductor matrix. It is often necessary to isolate the top portion of a box from the bottom portion to avoid shorting out the device. This is accomplished by introducing a small gap into the walls of the box. The channel thus formed must be thin enough so that it is normally depleted, and very little current can flow from inside the box to outside. In addition, the structure must be capable of sustaining a usable voltage between the top and bottom of the box without conduction occurring. Because of the dual nature of this requirement, the structure is called an orthogonal isolator. Test structures were fabricated that are capable of operation as either orthogonal isolators or JFETs.
Research Organization:
Minnesota Univ., Minneapolis (USA)
OSTI ID:
6721244
Country of Publication:
United States
Language:
English