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Double electron layer tunneling transistors by dual-side electron beam lithography

Journal Article · · Journal of Vacuum Science and Technology. B, Microelectronics Processing and Phenomena
DOI:https://doi.org/10.1116/1.590413· OSTI ID:670209
; ; ; ; ;  [1]
  1. Sandia National Laboratories, Albuquerque, New Mexico 87185-0603 (United States)

We describe the first demonstration of small-area double electron layer tunneling transistors (DELTTs) fabricated by dual-side electron beam lithography. The DELTT is a planar quantum device which operates by modulating the two-dimensional (2D)-to-2D tunneling between two coupled quantum wells. The fabrication technique utilizes the epoxy-bond and stop-etch process to remove the substrate material which allows the backside gates to be placed in close proximity (less than 1 {mu}m) to the frontside gates. The use of electron beam lithography provides precise alignment of the front and back features to each other. We have applied this technique to the fabrication of DELTTs on coupled AlGaAs/GaAs double quantum wells. Low temperature electrical characterization yields source-drain current{endash}voltage curves that exhibit negative differential resistance with peak-to-valley ratios of up to 8:1. The height and position of the resonant peak varies strongly with gate bias, demonstrating transistor action. {copyright} {ital 1998 American Vacuum Society.}

OSTI ID:
670209
Report Number(s):
CONF-9805132--
Journal Information:
Journal of Vacuum Science and Technology. B, Microelectronics Processing and Phenomena, Journal Name: Journal of Vacuum Science and Technology. B, Microelectronics Processing and Phenomena Journal Issue: 6 Vol. 16; ISSN JVTBD9; ISSN 0734-211X
Country of Publication:
United States
Language:
English

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