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A high-resolution and high-stability charge-integration ADC for high-rate experiments

Journal Article · · IEEE Trans. Nucl. Sci.; (United States)
DOI:https://doi.org/10.1109/23.3695· OSTI ID:6663155
A charge-integration ADC of 12-bit resolution was designed and built for the VENUS experiment at TRISTAN. The sample-and-hold process is done in the following way: First, outputs of a gated integrator were sampled before and after the integration of gate timing. Then the voltage difference between the outputs were recorded. By using this scheme, the output deviation caused by a short reset time is significantly reduced. The maximum deviation of the ADC counts is somewhat dependent on the time duration for the discharge and the amount of integrated charge before the discharge. These effects were, however, at most 3 counts and 2 counts respectively. The integral nonlinearity was found to be within +/- 1 LSB (least significant bit) and did not depend on the time duration for the discharge. The temperature coefficient of the gain was typically 100 ppm//sup 0/C. The temperature coefficient of the pedestal value was typically 0.15 counts//sup 0/C. The new ADC has been used for the Time-Of-Flight counters in VENUS detector system.
Research Organization:
Dept. of Physics, Kyoto Univ., Sakyo-ku, Kyoto 606 (JP)
OSTI ID:
6663155
Journal Information:
IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. 35:3; ISSN IETNA
Country of Publication:
United States
Language:
English