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High minority-carrier lifetimes in GaAs grown on low-defect-density Ge/GeSi/Si substrates

Journal Article · · Applied Physics Letters
DOI:https://doi.org/10.1063/1.122689· OSTI ID:664658
; ; ;  [1]; ; ; ; ;  [2];  [3]
  1. Department of Electrical Engineering, The Ohio State University, Columbus, Ohio 43210-1272 (United States)
  2. Massachusetts Institute of Technology, Cambridge, Massachusetts 02139 (United States)
  3. National Renewable Energy Laboratory, Golden, Colorado 80401 (United States)

A high bulk minority-carrier lifetime in GaAs grown on Si-based substrates is demonstrated. This was achieved by utilizing a step-graded Ge/GeSi buffer (threading dislocation density 2{times}10{sup 6} cm{sup {minus}2}) grown on an offcut (001) Si wafer, coupled with monolayer-scale control of the GaAs nucleation to suppress antiphase domains. Bulk minority-carrier lifetimes ({tau}{sub p}) were measured using room-temperature time-resolved photoluminescence applied to a series of Al{sub 0.3}Ga{sub 0.7}As/GaAs/Al{sub 0.3}Ga{sub 0.7}As double-heterojunction structures doped n=1.1{times}10{sup 17} cm{sup {minus}3} with GaAs thicknesses of 0.5, 1.0, and 1.5 {mu}m. A lifetime {tau}{sub p}=7.7 ns was determined for GaAs grown on Si. The extracted interface recombination velocity of 3.9{times}10{sup 3} cm/s is comparable to recombination velocities found for Al{sub 0.3}Ga{sub 0.7}As/GaAs interfaces grown on both GaAs and Ge wafers, indicating that the crosshatch surface morphology characteristic of strain-relaxed Ge/GeSi surfaces does not impede the formation of high-electronic-quality interfaces. These results hold great promise for future integration of III{endash}V minority-carrier devices with Si wafer technologies. {copyright} {ital 1998 American Institute of Physics.}

OSTI ID:
664658
Journal Information:
Applied Physics Letters, Journal Name: Applied Physics Letters Journal Issue: 21 Vol. 73; ISSN APPLAB; ISSN 0003-6951
Country of Publication:
United States
Language:
English

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