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Simulating synchronous processors. Technical report

Technical Report ·
OSTI ID:6642219

This paper shows how a distributed system with synchronous processors and asynchronous message delays can be simulated by a system with both asynchronous processors and asynchronous message delays in the presence of various types of processor faults. Consequently, the result of Fischer, Lynch and Paterson (1985), that no consensus protocol for asynchronous processors and communication can tolerate one failstop fault, implies a result of Dolev, Dwork, and Stockmeyer (1987), that no consensus protocol for synchronous processors and asynchronous communication can tolerate one failstop fault.

Research Organization:
Massachusetts Inst. of Tech., Cambridge (USA). Lab. for Computer Science
OSTI ID:
6642219
Report Number(s):
AD-A-197410/4/XAB; MIT/LCS/TM-359
Country of Publication:
United States
Language:
English