Enhanced high-frequency performance in a GaAs, self-aligned, n-JFET using a carbon buried p-implant
- Sandia National Labs., Albuquerque, NM (United States)
C ion implantation has been employed, for the first time, to form the buried p-layer in GaAs, self-aligned, ion implanted JFETs. Comparable DC performance was seen for JFETs with C or Mg implants; however, C-backside JFETs showed superior high-frequency performance. High dose C-backside devices had a f[sub max] of 43.2 GHz for a 0.5 [mu]m gate length that were 28% and 46% higher, respectively, than comparable Mg-implanted JFETs. This enhancement is a result of the lower C[sub gs] in the C-backside device resulting from the inherently low activation of the implanted C below the channel while the C still effectively compensated the tail of the Si-channel implant. This approach relaxes the trade-off between optimizing the DC and the AC performance for the buried p-implant in GaAs JFETs and MESFETs.
- DOE Contract Number:
- AC04-94AL85000
- OSTI ID:
- 6615201
- Journal Information:
- IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Electron Device Letters (Institute of Electrical and Electronics Engineers); (United States) Vol. 15:12; ISSN 0741-3106; ISSN EDLEDZ
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
426000* -- Engineering-- Components
Electron Devices & Circuits-- (1990-)
ARSENIC COMPOUNDS
ARSENIDES
CARBON IONS
CHARGED PARTICLES
DATA
EXPERIMENTAL DATA
FIELD EFFECT TRANSISTORS
GALLIUM ARSENIDES
GALLIUM COMPOUNDS
INFORMATION
ION IMPLANTATION
IONS
MATERIALS
NUMERICAL DATA
P-TYPE CONDUCTORS
PERFORMANCE
PNICTIDES
SEMICONDUCTOR DEVICES
SEMICONDUCTOR MATERIALS
TRANSISTORS