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Flexible 64 channel FASTBUS ADC with programmable zero suppression and bias correction

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA)
OSTI ID:6572802
; ;  [1]
  1. Heidelberg Univ. (Germany, F.R.). Physikalisches Inst.

This paper describes a modular FASTBUS ADC system for data acquisition in high energy and nuclear physics experiments with a high number of channels. One ADC module occupies two FASTBUS slots and provides 64 channels. Each module consists of three parts, an analog preprocessing part, the ADC section, and the FASTBUS slave interface logic. Each channel can individually be stuffed with TVCs (time-to-voltage converters),CVCs (charge-to-voltage converters), or PVCs (puls height-to-voltage converters). All channels are multiplexed to a single ADC unit. ADCs with a conversion time < 1 {mu}{ital s} and a data width of up to 16 bits can be used (2.7 {mu}{ital s}/12 bit currently). To reduce the total conversion and read-out time, channels can be skipped whose contents are outside of an analog window that can be programmed individually for each channel. The analog gain and a digital bias correction are also programmable for each channel. The differential nonlinearity can be eliminated by a statistical correction. The slave interface logic of the ADC module supports most of the standard FASTBUS operations. The FASTBUS ADC module is currently running as a prototype. All functions have been tested successfully.

OSTI ID:
6572802
Report Number(s):
CONF-900143--
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (USA) Vol. 37:2; ISSN 0018-9499; ISSN IETNA
Country of Publication:
United States
Language:
English