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SPICE analysis of the SEU sensitivity of a fully depleted SOI CMOS SRAM cell

Conference · · IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States)
OSTI ID:6558978
 [1]
  1. Ibis Technology Corporation, Danvers, MA (United States)

Fully depleted silicon-on-insulator (SOI) technologies are of interest for commercial applications as well as for use in harsh (radiation-intensive) environments. In both types of application, effects of charged particles (single-event effects) are of concern. Here, SPICE analysis of SEU sensitivity of a 6-T SRAM cell using commercially-representative fully depleted SOI CMOS technology parameters indicates that reduction of the minority carrier lifetime (parasitic bipolar gain) and use of thinner silicon can significantly reduce SEU sensitivity.

OSTI ID:
6558978
Report Number(s):
CONF-940726--
Journal Information:
IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States), Journal Name: IEEE Transactions on Nuclear Science (Institute of Electrical and Electronics Engineers); (United States) Vol. 41:6Pt1; ISSN 0018-9499; ISSN IETNAE
Country of Publication:
United States
Language:
English

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