MOS hardening approaches for low-temperature applications
Charge buildup in irradiated MOS devices is significantly more severe at low temperatures than at room temperature. Approaches for counteracting this problem are considered including: (1) careful selection of the applied field; (2) ion implantation of the oxide; (3) use of a thin oxide. Experimental and analytical results are presented and it is demonstrated that the applied field dependence of flatband voltage shift in MOS capacitors irradiated at 77/sup 0/K can be accounted for in terms of the field dependence of electron yield and the transport of holes at high fields. Analysis of ion implantation effects indicates that a significant improvement in radiation tolerance should be achievable by this method. A simultaneous consideration of the effects of oxide thickness and applied field on charge buildup in an unimplanted oxide suggests that reducing the thickness to approximately <500 A will largely eliminate low temperature problems in a steady-state ionizing radiation environment as long as the applied voltage is approximately >10 V.
- Research Organization:
- Northrop Research and Technology Center, Hawthorne, CA
- OSTI ID:
- 6544346
- Journal Information:
- IEEE Trans. Nucl. Sci.; (United States), Journal Name: IEEE Trans. Nucl. Sci.; (United States) Vol. NS-24:6; ISSN IETNA
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
360206 -- Ceramics
Cermets
& Refractories-- Radiation Effects
440200* -- Radiation Effects on Instrument Components
Instruments
or Electronic Systems
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
CHALCOGENIDES
ELECTRONIC CIRCUITS
HARDENING
INTEGRATED CIRCUITS
LOW TEMPERATURE
MANUFACTURING
MICROELECTRONIC CIRCUITS
MOS TRANSISTORS
OXIDES
OXYGEN COMPOUNDS
PHYSICAL RADIATION EFFECTS
RADIATION EFFECTS
RADIATION HARDENING
SEMICONDUCTOR DEVICES
SILICON COMPOUNDS
SILICON OXIDES
TEMPERATURE DEPENDENCE
TRANSISTORS