An integration of all refractory josephson logic LSI circuit

Conference · Fri Mar 01 04:00:00 EST 1985 · IEEE Trans. Magn.; (United States)

OSTI ID:6485825

Kosaka, S; Aoyaja, M; Hayakawa, H; Nakagawa, H; Ohigashi, H; Shinoki, F; Shoji, A; Tahara, S; Takada, S

An integration process for the fabrication of an all refractory Josephson LSI logic circuit is described. In this process, niobium nitride and niobium double-layered Josephson junctions were integrated using a reactive ion etching with a 2.5 ..mu..m minimum feature. A highly selective and anisotropic RIE process and a planarizing technology have been developed for intagrating a circuit with LSI complexity. For evaluating the process capability, test vehicle circuits with MSI/LSI level complexity have been designed and fabricated using this process. An 8 bit ripple carry adder and a 4X4 bit parallel multiplier have been integrated with Josephson four junction logic ( 4JL ) gates, the largest of which contains more than 2800 Josephson junctions. Both functionality and highspeed performance testings have been successfully performed with these test circuits.

• Research Organization: Electrotechnical Laboratory, Sakura-mura, Niihari-gun, Ibaraki
• OSTI ID: 6485825
• Report Number(s): CONF-840937-
• Conference Information: Journal Name: IEEE Trans. Magn.; (United States) Journal Volume: MAG-21:2
• Country of Publication: United States
• Language: English

Related Subjects

420201* -- Engineering-- Cryogenic Equipment & Devices
71 CLASSICAL AND QUANTUM MECHANICS
GENERAL PHYSICS
ELECTRONIC CIRCUITS
FABRICATION
JOSEPHSON JUNCTIONS
JUNCTIONS
LOGIC CIRCUITS
PERFORMANCE TESTING
REFRACTORIES
SUPERCONDUCTING JUNCTIONS
TESTING