Miniaturization of Josephson logic circuits
Conference
·
· IEEE Trans. Magn.; (United States)
OSTI ID:6485733
The performances of Current Injection Logic (CIL) and Resistor Coupled Josephson Logic (RCJL) have been evaluated for minimum features sizes ranging from 5 ..mu..m to 0.2 ..mu..m. The logic delay is limited to about 10 ps for both the CIL AND gate and the RCJL OR gate biased at 70% of maximum bias current. The maximum circuit count on an 6.35 x 6.35 chip is 13,000 for CIL gates and 20,000 for RCJL gates. Some suggestions are given for further improvements.
- Research Organization:
- Department of Electrical Engineering and Computer Science, Electronics Research Laboratory, University of California, Berkeley, CA
- OSTI ID:
- 6485733
- Report Number(s):
- CONF-840937-
- Journal Information:
- IEEE Trans. Magn.; (United States), Journal Name: IEEE Trans. Magn.; (United States) Vol. MAG-21:2; ISSN IEMGA
- Country of Publication:
- United States
- Language:
- English
Similar Records
Logic delays of 5-. mu. m resistor coupled Josephson logic
Resistor coupled Josephson logic
280-ps 6-bit RCJL decoder using high-drivability and unit circuit for a 1-kbit Josephson cache memory
Journal Article
·
Sun Oct 31 23:00:00 EST 1982
· Appl. Phys. Lett.; (United States)
·
OSTI ID:7081186
Resistor coupled Josephson logic
Journal Article
·
Wed Apr 14 23:00:00 EST 1982
· Appl. Phys. Lett.; (United States)
·
OSTI ID:5532233
280-ps 6-bit RCJL decoder using high-drivability and unit circuit for a 1-kbit Josephson cache memory
Journal Article
·
Thu Oct 01 00:00:00 EDT 1987
· IEEE J. Solid-State Circuits; (United States)
·
OSTI ID:5502192