High-speed instruction control for vector processors with remapping
This patent describes an instruction flow control system for a main processor for processing mapped and remapped instructions, mapped instructions being where the address or instructions is not loaded directly into an active control register but is modified prior to loading, remapped instructions being where the instruction is modified at least twice, the instructions including operation codes based on which the determination is made whether to remap the instructions, comprising: instruction buffer means connected to the main processor for receiving stored program instructions to be remapped; program address generator means connected to the instruction buffer means for fetching instructions to be remapped; map gate array means connected to the instruction buffer means for determining whether certain of the instructions from the instruction buffer are to be mapped or remapped and for instructions to be remapped generating an address including a constant address and a variable address which are indicative of a plurality of operation codes in response to a single remap program instruction being fetched from the instruction buffer means; and a program instruction translate RAM connected to the output of the map gate array means for decoding each of the constant and the variable address into a plurality of operation code instructions for controlling the main processor, whereby a plurality of operation codes may be generated from a single instruction to be remapped by the map gate array means and the program instruction translate ram.
- Assignee:
- Sperry Corp., Blue Bell, PA
- Patent Number(s):
- US 4791559
- OSTI ID:
- 6450231
- Resource Relation:
- Patent File Date: Filed date 10 Nov 1986
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
SUPERCOMPUTERS
VECTOR PROCESSING
EXECUTIVE CODES
COMPUTER ARCHITECTURE
CONTROL
EFFICIENCY
GATING CIRCUITS
MAPPING
COMPUTER CODES
COMPUTERS
DIGITAL COMPUTERS
ELECTRONIC CIRCUITS
PROGRAMMING
990210* - Supercomputers- (1987-1989)