Dynamically adapting mechanism for translation lookaside buffer shootdowns
An operating system (OS) of a processing system having a plurality of processor cores determines a cost associated with different mechanisms for performing a translation lookaside buffer (TLB) shootdown in response to, for example, a virtual address being remapped to a new physical address, and selects a TLB shootdown mechanism to purge outdated or invalid address translations from the TLB based on the determined cost. In some embodiments, the OS selects an inter-processor interrupt (IPI) as the TLB shootdown mechanism if the cost associated with sending an IPI is less than a threshold cost. In some embodiments, the OS compares the cost of using an IPI as the TLB shootdown mechanism versus the cost of sending a hardware broadcast to all processor cores of the processing system as the shootdown mechanism and selects the shootdown mechanism having the lower cost.
- Research Organization:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Organization:
- USDOE
- DOE Contract Number:
- AC52-07NA27344; B620717
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- Patent Number(s):
- 10,552,339
- Application Number:
- 16/005,882
- OSTI ID:
- 1632526
- Resource Relation:
- Patent File Date: 06/12/2018
- Country of Publication:
- United States
- Language:
- English
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