Systolic architectures for the computation of the discrete Hartley and the discrete cosine transforms based on prime factor decomposition

Journal Article · Wed Oct 31 23:00:00 EST 1990 · IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA)

DOI:https://doi.org/10.1109/12.61045· OSTI ID:6357407

Chakrabarti, C ^[1]; Ja Ja, J ^[1]

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1. Maryland Univ., College Park, MD (USA). Dept. of Electrical Engineering

This paper proposes two-dimensional systolic array implementations for computing the discrete Hartley (DHT) and the discrete cosine transforms (DCT) when the transform size N is decomposable into mutually prime factors. The existing two-dimensional formulations for DHT and DCT are modified and the corresponding algorithms are mapped into two-dimensional systolic arrays. The resulting architecture is fully pipelined with no control units. The hardware design is based on bit serial left to right MSB to LSB binary arithmetic.

• OSTI ID: 6357407
• Journal Information: IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA), Journal Name: IEEE Transactions on Computers (Institute of Electrical and Electronics Engineers); (USA) Vol. 39:11; ISSN ITCOB; ISSN 0018-9340
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990200* -- Mathematics & Computers
ALGORITHMS
ARRAY PROCESSORS
COMPUTER ARCHITECTURE
COMPUTER CODES
DESIGN
MATHEMATICAL LOGIC
PARALLEL PROCESSING
PROGRAMMING
TWO-DIMENSIONAL CALCULATIONS