Parallel depth first search. Part I. Implementation

Journal Article · Mon Nov 30 23:00:00 EST 1987 · Int. J. Parallel Program.; (United States)

DOI:https://doi.org/10.1007/BF01389000· OSTI ID:6316388

Rao, V N; Kumar, V

This paper presents a parallel formation of depth-first search which retains the storage efficiency of sequential depth-first search and can be mapped on to any MIMD architecture. To study its effectiveness it has been implemented to solve the 15-puzzle problem on three commercially available multiprocessors - Sequent Balance 21,000, the Intel Hypercube and BBN Butterfly. The authors have been able to achieve fairly linear speedup on Sequent up to 30 processors (the maximum configuration available) and on the Intel Hypercube and BBN Butterfly up to 128 processors (the maximum configurations available). Many researchers considered the ring architecture to be quite suitable for parallel depth-first search. Their experimental results show that hypercube and shared-memory architectures are significantly better. At the heart of their parallel formulation is a dynamic work distribution scheme that divides the work between different processors. The effectiveness of the parallel formulation is strongly influenced by the work distribution scheme and architectural features such as presence/absence of shared memory, the diameter of the network, relative speed of the communication network, etc. In a companion paper, they analyze the effectiveness of different load-balancing schemes and architectures, and also present new improved work distribution schemes.

• OSTI ID: 6316388
• Journal Information: Int. J. Parallel Program.; (United States), Journal Name: Int. J. Parallel Program.; (United States) Vol. 16:6; ISSN IJPPE
• Country of Publication: United States
• Language: English

Related Subjects

99 GENERAL AND MISCELLANEOUS
990210* -- Supercomputers-- (1987-1989)
ALGORITHMS
ARRAY PROCESSORS
COMMUNICATIONS
COMPUTER ARCHITECTURE
COMPUTER CODES
DATA PROCESSING
DATA TRANSMISSION
EFFICIENCY
IMPLEMENTATION
ITERATIVE METHODS
MATHEMATICAL LOGIC
MEMORY DEVICES
PARALLEL PROCESSING
PERFORMANCE
PROCESSING
PROGRAMMING
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