On the design of systolic-array architectures with applications to signal processing
Systolic arrays are networks of processors that rhythmically compute and paw data through systems. These arrays feature the important properties of modularity, regularity, local interconnections, and a high degree of pipelining and multiprocessing. In this dissertation, several systolic arrays are proposed with applications to real-time signal processing. Specifically, these arrays are designed for the rapid computation of position velocities, accelerations, and jerks associated with motion. Real-time computations of these parameters arise in many applications, notably in the areas of robotics, image-processing, remote signal processing, and computer-controlled machines. The systolic arrays proposed in this dissertation can be classified into the linear, the triangular, and the mesh connected types. In the linear category, six different systolic designs are presented. The relative merits of these designs are discussed in detail. It is found from the analysis of these designs that each of these arrays achieves a proportional increase in time. Also, by interleaving the input data items in some of these designs, the throughput rate is further doubled. This also increases the processor utilization rate to 100%. The triangular type systolic array is found to be useful when all three parameters are to be computed simultaneously, and the mesh type, when the number of signals to be processed are extremely large. The effect of direct broadcasting of data to the processing cells is also investigated. Finally, the utility of the proposed systolic arrays is illustrated by a practical design example.
- Research Organization:
- Toledo Univ., OH (USA)
- OSTI ID:
- 6310020
- Resource Relation:
- Other Information: Thesis (Ph.D)
- Country of Publication:
- United States
- Language:
- English
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