Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS
Conference
·
OSTI ID:6294306
Significant improvements have been made in the radiation hardness of silicon-gate CMOS by reducing the gate oxide thickness. The device studied is an 8-bit arithmetic logic unit designed with Sandia's Expanded Linear Array (ELA) standard cells. Devices with gate oxide thicknesses of 400, 570 (standard), and 700 A were fabricated. Irradiations were done at a dose rate of 2 x 10/sup 6/ rads (Si) per hour. N- and P-channel maximum threshold shifts were reduced by 0.3 and 1.2 volts, respectively, for the thinnest oxide. Approximately, a linear relationship is found for threshold shift versus thickness. The functional radiation hardness of the full integrated circuit was also measured.
- Research Organization:
- Sandia National Labs., Livermore, CA (USA)
- DOE Contract Number:
- AC04-76DP00789
- OSTI ID:
- 6294306
- Report Number(s):
- SAND-81-1680C; CONF-810707-7; ON: DE81027202
- Country of Publication:
- United States
- Language:
- English
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Related Subjects
440200* -- Radiation Effects on Instrument Components
Instruments
or Electronic Systems
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ELECTRONIC CIRCUITS
HARDENING
INTEGRATED CIRCUITS
MICROELECTRONIC CIRCUITS
MOS TRANSISTORS
PHYSICAL RADIATION EFFECTS
RADIATION EFFECTS
RADIATION HARDENING
SEMICONDUCTOR DEVICES
SPECIFICATIONS
TRANSISTORS
Instruments
or Electronic Systems
46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
ELECTRONIC CIRCUITS
HARDENING
INTEGRATED CIRCUITS
MICROELECTRONIC CIRCUITS
MOS TRANSISTORS
PHYSICAL RADIATION EFFECTS
RADIATION EFFECTS
RADIATION HARDENING
SEMICONDUCTOR DEVICES
SPECIFICATIONS
TRANSISTORS