Effect of gate oxide thickness on the radiation hardness of silicon-gate CMOS

Conference · Thu Jan 01 00:00:00 EST 1981

OSTI ID:6294306

Nordstrom, T V; Gibbon, C F

Significant improvements have been made in the radiation hardness of silicon-gate CMOS by reducing the gate oxide thickness. The device studied is an 8-bit arithmetic logic unit designed with Sandia's Expanded Linear Array (ELA) standard cells. Devices with gate oxide thicknesses of 400, 570 (standard), and 700 A were fabricated. Irradiations were done at a dose rate of 2 x 10/sup 6/ rads (Si) per hour. N- and P-channel maximum threshold shifts were reduced by 0.3 and 1.2 volts, respectively, for the thinnest oxide. Approximately, a linear relationship is found for threshold shift versus thickness. The functional radiation hardness of the full integrated circuit was also measured.

• Research Organization: Sandia National Labs., Livermore, CA (USA)
• DOE Contract Number: AC04-76DP00789
• OSTI ID: 6294306
• Report Number(s): SAND-81-1680C; CONF-810707-7; ON: DE81027202; TRN: 81-014164
• Resource Relation: Conference: IEEE conference on nuclear science and space radiation, Seattle, WA, USA, 21 Jul 1981
• Country of Publication: United States
• Language: English

Related Subjects

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND TECHNOLOGY
INTEGRATED CIRCUITS
RADIATION HARDENING
MOS TRANSISTORS
SPECIFICATIONS
ELECTRONIC CIRCUITS
HARDENING
MICROELECTRONIC CIRCUITS
PHYSICAL RADIATION EFFECTS
RADIATION EFFECTS
SEMICONDUCTOR DEVICES
TRANSISTORS
440200* - Radiation Effects on Instrument Components
Instruments
or Electronic Systems