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Triggering of avalanche transistor pulse circuits

Technical Report ·
OSTI ID:6253391
This paper describes a new method of triggering avalanche transistor pulse circuits which is called collector triggering and which meets the above requirement of having associated delays of only a few millimicroseconds. A quantitative theory is developed which gives the optimum biasing conditions for these circuits and which is able to predict with a fair amount of accuracy the delays to be expected for a specific form of collector triggering. The theory is then qualitatively extended to show that in more practical collector triggering circuits comparably short delays should also be expected. Experimental measurements of actual trigger delays tend to support the theory.
Research Organization:
Stanford Univ., CA (USA). Stanford Electronics Labs.
OSTI ID:
6253391
Report Number(s):
NP-5900368; ON: TI85900368
Country of Publication:
United States
Language:
English

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